| CPC H04W 72/23 (2023.01) | 18 Claims |

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13. An electronic device, comprising a processor and a non-transitory memory medium storing a computer program, the processor being configured for performing the computer program to execute a signal processing method, comprising:
configuring a dynamic control signaling, wherein the dynamic control signaling is configured to instruct a UE to determine an application delay, and the application delay is a delay for switching signal receiving modes by the UE; and
sending the dynamic control signaling to the UE, for rendering the UE to determine the application delay on the basis of the dynamic control signaling, and employ a signal receiving mode after being switched to execute a signal receiving operation;
wherein configuring the dynamic control signaling comprises:
configuring at least one bit in the dynamic control signaling, wherein the at least one bit is configured for triggering the UE to switch from a source PDCCH SS group to a target PDCCH SS group, the source PDCCH SS group comprises at least one source SS set, and the target PDCCH SS group comprises at least one target SS set; or,
configuring at least one bit in the dynamic control signaling, wherein the at least one bit is configured for triggering the UE to switch from a source parameter to a target parameter of a same PDCCH SS group, the source parameter comprises at least one of a source monitoring period, and a source monitoring position; and the target parameter comprises at least one of a target monitoring period, and a target monitoring position.
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