| CPC H04W 72/1263 (2013.01) [H04W 72/0446 (2013.01); H04W 72/0453 (2013.01); H04W 72/23 (2023.01)] | 15 Claims |

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1. An apparatus, comprising:
one or more processors; and
a memory coupled to the one or more processors and storing programming instructions for execution by the one or more processors to cause the apparatus to:
determine a first control resource set, wherein a quantity of symbols comprised in the first control resource set in time domain is a positive integer less than or equal to M, and M is an integer greater than 3; and
receive control information on one or more resource elements in the first control resource set.
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