US 12,255,972 B2
Edge computing local breakout
Arvind Merwaday, Beaverton, OR (US); Kathiravetpillai Sivanesan, Portland, OR (US); Leonardo Gomes Baltar, Munich (DE); and Suman A. Sehra, Folsom, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Aug. 20, 2021, as Appl. No. 17/407,456.
Claims priority of provisional application 63/068,866, filed on Aug. 21, 2020.
Prior Publication US 2022/0038554 A1, Feb. 3, 2022
Int. Cl. H04L 67/63 (2022.01); H04L 45/64 (2022.01)
CPC H04L 67/63 (2022.05) [H04L 45/64 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An apparatus comprising:
interface circuitry to receive data packets from user equipment (UE) different than an edge compute node; and
at least one processor circuit to be programed by instructions to:
cause a first data packet to be routed to the edge compute node based on the first data packet including edge-service data related to a microservice provided by the edge compute node; and
cause a second data packet to be routed over a user plane (UP) interface to a serving gateway (SGW) in an evolved packet core (EPC) based on the second data packet not including edge-service data related to the microservice, the UP interface to provide data communication between the edge compute node and the SGW, an Evolved Packet System (EPS) bearer to provide data communication between the UE and the EPC, the EPS bearer to extend through the edge compute node; and
establish an edge bearer to provide data communication between the UE and the edge compute node, the edge bearer distinct from the EPS bearer.