| CPC H04L 1/0061 (2013.01) [G06F 5/06 (2013.01); G06F 11/00 (2013.01); H04L 1/0045 (2013.01)] | 20 Claims |

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1. A data transmission apparatus, comprising:
a transmit-side circuit, belonging to a first clock domain, and configured to store a plurality of input data; and
a receive-side circuit, belonging to a second clock domain, and configured to read a plurality of output data from the transmit-side circuit,
wherein the transmit-side circuit is configured to calculate a transmit-side parity value according to the plurality of input data, and the receive-side circuit is configured to calculate a receive-side parity value according to the plurality of output data,
wherein the receive-side circuit is configured to compare the transmit-side parity value with the receive-side parity value to generate a control signal, and the transmit-side circuit and the receive-side circuit are configured to reset, according to the control signal, a write pointer of the transmit-side circuit and a read pointer of the receive-side circuit.
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