| CPC H02M 3/33592 (2013.01) [H02M 1/0058 (2021.05); Y02B 70/10 (2013.01)] | 21 Claims |

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1. A three-level rectification DC/DC converter, comprising:
a primary circuit receiving an input voltage and comprising a plurality of primary switches;
a resonant tank circuit comprising a resonant inductor, a resonant capacitor, and a transformer, wherein a first primary terminal and a second primary terminal of the resonant tank circuit are coupled to the primary circuit, a primary winding of the transformer is coupled between the first and second primary terminals, a secondary winding of the transformer is coupled between a first secondary terminal and a second secondary terminal of the resonant tank circuit, a voltage between the first and second primary terminals is a first voltage, a voltage between the first and second secondary terminals is a second voltage; and
a secondary circuit comprising a flying capacitor, a switch bridge arm, and a capacitor bridge arm, wherein the switch bridge arm comprises a first secondary switch, a second secondary switch, a third secondary switch, and a fourth secondary switch sequentially connected in series, two terminals of the flying capacitor are connected to a node between the first and second secondary switches and a node between the third and fourth secondary switches respectively, a node between the second and third secondary switches is connected to the first secondary terminal, the capacitor bridge arm comprises a first output capacitor and a second output capacitor connected in series, a node between the first and second output capacitors is connected to the second secondary terminal, two terminals of the capacitor bridge arm are connected to two terminals of the switch bridge arm, and a voltage between the two terminals of the capacitor bridge arm is an output voltage,
wherein the first, second, third, and fourth secondary switches have a same switching frequency, there are two rising edges and two falling edges in two consecutive periods of the first voltage, during the two consecutive periods, the first secondary switch is at least in an on state for preset time length after one of the two falling edges, the second secondary switch is it least in the on state for the preset time length after one of the two ling edges, the third secondary switch is at least in the on state for the preset time length after one of the two rising edges, and the fourth secondary switch is at least in the on state for the preset time length after another one of the two rising edges.
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