US 12,255,237 B2
Semiconductor memory device and method of manufacturing the same
Chang Soo Lee, Icheon-si (KR); Young Ho Yang, Icheon-si (KR); Sung Soon Kim, Icheon-si (KR); Hee Soo Kim, Icheon-si (KR); Hee Do Na, Icheon-si (KR); and Min Sik Jang, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Sep. 15, 2023, as Appl. No. 18/468,259.
Application 18/468,259 is a division of application No. 17/231,629, filed on Apr. 15, 2021, granted, now 11,799,003.
Claims priority of application No. 10-2020-0167805 (KR), filed on Dec. 3, 2020.
Prior Publication US 2024/0006495 A1, Jan. 4, 2024
Int. Cl. H01L 29/417 (2006.01); H01L 29/08 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/41741 (2013.01) [H01L 29/0847 (2013.01); H01L 29/401 (2013.01); H01L 29/66666 (2013.01); H01L 29/78642 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor memory device, the method comprising:
forming a source structure including a source sacrificial structure;
forming a stack on the source structure;
forming a trench passing through the stack;
forming a cavity by removing the source sacrificial structure through the trench;
forming a first material layer including an air gap in the cavity;
exposing a side portion of the air gap by etching a portion of the first material layer; and
forming a second material layer that is in contact with the exposed side portion of the air gap.