US 12,255,230 B2
Semiconductor structure and method for forming the same
Tsung-Lin Lee, Hsinchu (TW); Choh-Fei Yeap, Hsinchu (TW); Da-Wen Lin, Hsinchu (TW); and Chih-Chieh Yeh, Taipei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Mar. 31, 2022, as Appl. No. 17/709,583.
Prior Publication US 2023/0317784 A1, Oct. 5, 2023
Int. Cl. H01L 29/423 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/0665 (2013.01) [H01L 21/823412 (2013.01); H01L 21/823418 (2013.01); H01L 29/42392 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
forming a semiconductor fin structure over a substrate, wherein the semiconductor fin structure includes first semiconductor layers and second semiconductor layers alternatingly stacked;
forming a semiconductor capping layer surrounding the semiconductor fin structure;
laterally recessing the first semiconductor layers of the semiconductor fin structure and the semiconductor capping layer to form first notches in the first semiconductor layers and a second notch in the semiconductor capping layer;
forming first passivation layers on first sidewalls of the first semiconductor layers exposed from the first notches and a second passivation layer on a second sidewall of the semiconductor capping layer exposed from the second notch; and
forming first inner spacer layers in the first notches and a second inner spacer layer in the second notch.