US 12,255,228 B2
Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device
Masanobu Iwaya, Matsumoto (JP); and Kensuke Hata, Kariya (JP)
Assigned to FUJI ELECTRIC CO., LTD., Kawasaki (JP); and DENSO CORPORATION, Kariya (JP)
Filed by FUJI ELECTRIC CO., LTD., Kawasaki (JP); and DENSO CORPORATION, Kariya (JP)
Filed on Feb. 23, 2022, as Appl. No. 17/678,661.
Claims priority of application No. 2021-045826 (JP), filed on Mar. 19, 2021.
Prior Publication US 2022/0302251 A1, Sep. 22, 2022
Int. Cl. H01L 29/15 (2006.01); H01L 21/04 (2006.01); H01L 21/76 (2006.01); H01L 21/761 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/063 (2013.01) [H01L 21/046 (2013.01); H01L 21/7602 (2013.01); H01L 21/761 (2013.01); H01L 29/1095 (2013.01); H01L 29/1608 (2013.01); H01L 29/66068 (2013.01); H01L 29/7813 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A silicon carbide semiconductor device, comprising:
a silicon carbide semiconductor substrate of a first conductivity type, having a first surface and a second surface opposite to each other;
a first semiconductor layer of the first conductivity type, provided on the first surface of the silicon carbide semiconductor substrate, the first semiconductor layer having an impurity concentration lower than an impurity concentration of the silicon carbide semiconductor substrate, the first semiconductor layer having a first surface and a second surface opposite to each other, the second surface of the first semiconductor layer facing the silicon carbide semiconductor substrate;
a second semiconductor layer of a second conductivity type, provided on the first surface of the first semiconductor layer, the second semiconductor layer having a first surface and a second surface opposite to each other, the second surface of the second semiconductor layer facing the silicon carbide semiconductor substrate;
a third semiconductor layer of the first conductivity type, selectively provided at the first surface of the second semiconductor layer, the third semiconductor layer having a first surface and a second surface opposite to each other, the second surface facing the silicon carbide semiconductor substrate;
a first semiconductor region of the first conductivity type, selectively provided at the first surface of the third semiconductor layer;
a second semiconductor region of the second conductivity type, selectively provided in the third semiconductor layer, the second semiconductor region penetrating through the third semiconductor layer from the first surface of the third semiconductor layer, and having an impurity concentration higher than an impurity concentration of the second semiconductor layer;
a trench penetrating through the first semiconductor region, the second semiconductor layer, and the third semiconductor layer, and reaching the first semiconductor layer;
a gate electrode provided in the trench via a gate insulating film;
an interlayer insulating film provided on the gate electrode;
a first electrode provided on the first surface of the second semiconductor layer and a surface of the first semiconductor region; and
a second electrode provided on the second surface of the silicon carbide semiconductor substrate, wherein
the first semiconductor region has an impurity concentration that gradually decreases closer to the third semiconductor layer,
the third semiconductor layer has an impurity concentration that is substantially constant, and
the first semiconductor region is thinner than a portion of the third semiconductor layer that is between the first semiconductor region and the second semiconductor layer.