US 12,255,219 B2
Image sensor with overlap of backside trench isolation structure and vertical transfer gate
Feng-Chi Hung, Chu-Bei (TW); Dun-Nian Yaung, Taipei (TW); Jen-Cheng Liu, Hsin-Chu (TW); Wei Chuang Wu, Tainan (TW); Yen-Yu Chen, Kaohsiung (TW); and Chih-Kuan Yu, Nantou County (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Jul. 20, 2023, as Appl. No. 18/355,481.
Application 17/867,760 is a division of application No. 16/733,433, filed on Jan. 3, 2020, granted, now 11,437,420, issued on Sep. 6, 2022.
Application 18/355,481 is a continuation of application No. 17/867,760, filed on Jul. 19, 2022, granted, now 11,791,361.
Prior Publication US 2023/0361143 A1, Nov. 9, 2023
Int. Cl. H01L 27/146 (2006.01)
CPC H01L 27/1463 (2013.01) [H01L 27/1461 (2013.01); H01L 27/14614 (2013.01); H01L 27/14621 (2013.01); H01L 27/14627 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 27/1464 (2013.01); H01L 27/14645 (2013.01); H01L 27/14685 (2013.01); H01L 27/14689 (2013.01); H01L 27/1469 (2013.01); H01L 27/14605 (2013.01); H01L 27/14683 (2013.01)] 20 Claims
OG exemplary drawing
 
15. An image sensor comprising:
a semiconductor substrate having a first side and a second side opposite the first side;
a first photodetector and a second photodetector in the semiconductor substrate, the second photodetector neighboring the first photodetector;
a first transfer gate over the first photodetector and a second transfer gate over the second photodetector, the first transfer gate having a first lateral portion extending over the first side of the semiconductor substrate and having a first vertical portion extending from the first lateral portion to below the first side of the semiconductor substrate, the second transfer gate having a second lateral portion extending over the first side of the semiconductor substrate and having a second vertical portion extending from the second lateral portion to below the first side of the semiconductor substrate;
a doped region in the semiconductor substrate, the doped region extending from the first side toward the second side of the semiconductor substrate and directly between the first transfer gate and the second transfer gate; and
a trench isolation structure directly under the doped region and extending into the semiconductor substrate from the second side of the semiconductor substrate toward the first side of the semiconductor substrate and directly between the first transfer gate and the second transfer gate, wherein an upper surface of the trench isolation structure is above a lower surface of the first vertical portion and a lower surface of the second vertical portion,
wherein a lateral distance between the doped region and the first vertical portion is less than a lateral distance between the trench isolation structure and the first vertical portion, and wherein a lateral distance between the doped region and the second vertical portion is greater than a lateral distance between the trench isolation structure and the second vertical portion.