US 12,255,211 B2
Array substrate and manufacturing method thereof, and display apparatus
Min Cheng, Beijing (CN); Ke Dai, Beijing (CN); Haipeng Yang, Beijing (CN); Maoxiu Zhou, Beijing (CN); Jiaqing Liu, Beijing (CN); and Xipeng Wang, Beijing (CN)
Assigned to Hefei BOE Display Technology Co., Ltd., Anhui (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/908,226
Filed by Hefei BOE Display Technology Co., Ltd., Anhui (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Oct. 15, 2021, PCT No. PCT/CN2021/124071
§ 371(c)(1), (2) Date Aug. 30, 2022,
PCT Pub. No. WO2023/060547, PCT Pub. Date Apr. 20, 2023.
Prior Publication US 2024/0213272 A1, Jun. 27, 2024
Int. Cl. H01L 27/12 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01)
CPC H01L 27/1244 (2013.01) [G02F 1/136209 (2013.01); G02F 1/136295 (2021.01); G02F 1/1368 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An array substrate, comprising a plurality of gate lines and a plurality of data lines disposed on a base substrate, wherein the plurality of gate lines are extended along a first direction and are sequentially arranged in a second direction, the plurality of data lines are extended along the second direction and are sequentially arranged in the first direction, the plurality of gate lines and the plurality of data lines are intersected to define a plurality of sub-pixels, and each sub-pixel at least comprises a thin film transistor, a pixel electrode and a common electrode, the first direction is intersected with the second direction; the common electrode in at least one sub-pixel is connected with the common electrode in an adjacent sub-pixel in the second direction through a common connection portion, there is a first overlapped region between an orthographic projection of the common connection portion on the base substrate and an orthographic projection of a gate line on the base substrate, and the first overlapped region has a first width in the first direction and a second width in the second direction, wherein the first width is less than the second width;
wherein the common electrode in at least one sub-pixel at least comprises a common base portion and a common pectination portion, the common pectination portion comprises a plurality of common strip electrodes, an orthographic projection of the common base portion on the base substrate overlaps with an orthographic projection of a gate line on the base substrate.