US 12,255,205 B2
Semiconductor device with isolation structure
Chieh-Ping Wang, Hsinchu (TW); Tai-Chun Huang, Hsin-Chu (TW); Yung-Cheng Lu, Hsinchu (TW); Ting-Gang Chen, Taipei (TW); and Chi On Chui, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on May 27, 2022, as Appl. No. 17/826,845.
Application 17/826,845 is a continuation of application No. 16/863,371, filed on Apr. 30, 2020, granted, now 11,348,917.
Prior Publication US 2022/0293596 A1, Sep. 15, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H10B 99/00 (2023.01)
CPC H01L 27/0886 (2013.01) [H01L 21/823431 (2013.01); H01L 21/823481 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01); H01L 27/0924 (2013.01); H10B 99/00 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
first and second fin structures disposed on the substrate, wherein each of the first and second fin structures comprises a first fin portion and a second fin portion;
first and second gate structures disposed on the first and second fin portions, respectively, of the first fin structure, wherein the first and second gate structures are substantially parallel to each other;
third and fourth gate structures disposed on the first and second fin portions, respectively, of the second fin structure;
a first isolation structure disposed between the first and third gate structures and comprising a first nitride layer and a first oxide layer disposed on the first nitride layer; and
a second isolation structure disposed between the second and fourth gate structures and comprising a second nitride layer and a second oxide layer disposed on the second nitride layer,
wherein the first and second isolation structures are substantially parallel to the first and second fin structures.