| CPC H01L 24/08 (2013.01) [H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 2224/03848 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05541 (2013.01); H01L 2224/05583 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05687 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/29187 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/80895 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06548 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1436 (2013.01)] | 13 Claims |

|
1. A semiconductor die assembly, comprising:
a first semiconductor die including a first bond pad on a first side of the first semiconductor die; and
a second semiconductor die including a second bond pad on a second side of the second semiconductor die, wherein:
the first bond pad is aligned and bonded to the second bond pad at a bonding interface therebetween; and
at least one of the first and second bond pads include a first copper layer having primarily a first crystallographic orientation and a second copper layer having primarily a second crystallographic orientation different than the first crystallographic orientation, the first copper layer located at the bonding interface,
wherein the first bond pad is connected to a through-substrate via (TSV) extending through the first semiconductor die and configured to couple the first bond pad to a conductive structure on a third side of the first semiconductor die, the third side opposite to the first side.
|