| CPC H01L 23/5283 (2013.01) [H01L 23/5226 (2013.01); H10B 41/35 (2023.02)] | 20 Claims |
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1. A semiconductor device, comprising:
a plurality of semiconductor elements, each of the plurality of semiconductor elements including a gate structure extending in a first direction, parallel to an upper surface of a substrate, and an active region provided on both sides of the gate structure in a second direction intersecting the first direction; and
a plurality of interconnection patterns connected to the plurality of semiconductor elements,
wherein the plurality of interconnection patterns include:
a plurality of upper interconnections provided above the plurality of semiconductor elements in a third direction perpendicular to the upper surface of the substrate,
a plurality of intermediate interconnections provided between the plurality of semiconductor elements and the plurality of upper interconnections in the third direction, and
a routing interconnection extending in the first direction and adjacent to at least one of the plurality of semiconductor elements in the second direction, a length of the routing interconnection in the first direction is greater than a length of the active region in the first direction,
wherein the routing interconnection is connected to at least one of the plurality of intermediate interconnections in the first direction or the second direction.
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