| CPC H01L 23/49513 (2013.01) [H01L 21/52 (2013.01); H01L 23/48 (2013.01); H01L 23/4952 (2013.01); H01L 23/49541 (2013.01); H01L 23/49562 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/07 (2013.01); H01L 25/18 (2013.01); H01L 29/2003 (2013.01); H01L 23/3107 (2013.01); H01L 23/562 (2013.01); H01L 24/45 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/29116 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/49109 (2013.01); H01L 2224/49111 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/014 (2013.01); H01L 2924/181 (2013.01); H01L 2924/3511 (2013.01)] | 27 Claims |
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1. A semiconductor device comprising:
a nitride semiconductor chip including a silicon substrate having a first thermal expansion coefficient and an InxGayA11-x-yN layer in contact with a surface of the silicon substrate, where 0≤x≤1, 0≤y≤1, 0≤x+y≤1, the nitride semiconductor chip having a thickness of at least 0.250 mm and at most 0.350 mm, and including a heterojunction interface including a two-dimensional electron gas layer;
a plurality of pads including a gate pad, a source pad, and a drain pad, the plurality of pads being provided on a top side of the nitride semiconductor chip;
a die pad including Cu and having a second thermal expansion coefficient that is greater than the first thermal expansion coefficient;
an adhesive that joins a backside of the nitride semiconductor chip and the die pad;
a plurality of terminals including a gate terminal, two source terminals, and a plurality of drain terminals; and
two first electrodes, each of which is electrically and directly connected to a corresponding one of the two source terminals and the die pad, wherein:
the semiconductor device is a rectangular package having a first side and a second side that are two opposed sides and longer sides of the rectangular package,
the plurality of drain terminals are disposed along the second side of the semiconductor device,
the plurality of drain terminals are separated from the die pad,
a distance from the second side to a center of the die pad in a plan view of the semiconductor device is longer than a distance from the first side to the center of the die pad, each source terminal among the two source terminals is connected to the source pad by a plurality of first bonding wires including gold, and an end of each of the plurality of first bonding wires is provided at a position overlapping the two source terminals in the plan view,
each drain terminal among the plurality of drain terminals is connected to the drain pad by a plurality of second bonding wires including gold, and an end of each of the plurality of second bonding wires is provided at a position overlapping the plurality of drain terminals in the plan view,
each drain terminal among the plurality of drain terminals is connected to the drain pad by four of the plurality of second bonding wires,
the semiconductor device further includes a source sensor terminal disposed along the first side of the semiconductor device,
the source sensor terminal is separated from the die pad,
the two source terminals, the source sensor terminal and the gate terminal are disposed along the first side of the semiconductor device in this order,
the source sensor terminal and the source pad are connected with at least one third bonding wire,
a number of the first bonding wires connecting each source terminal among the two source terminals and the source pad is greater than a number of the at least one third bonding wire, and
the two first electrodes are elements independent from the two source terminals.
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