| CPC H01L 22/32 (2013.01) [G01R 31/2887 (2013.01); H01L 22/12 (2013.01); H01L 22/14 (2013.01); H01L 22/34 (2013.01)] | 7 Claims |
|
1. An alignment method for performing alignment of a plurality of probes with a wafer that includes a plurality of chips, wherein any two of the chips adjacent to each other have a dicing road there-between, the dicing road has a plurality of test keys, and the wafer has wafer coordinate information, the alignment method comprising:
providing a probe card having at least two probes; wherein two probes are configured to respectively align one of the test keys located on any two of dicing roads; and
providing an image capture device to capture and obtain relative positions between the two probes and two of the test keys;
wherein, when the two probes and the two test keys are determined to be aligned with each other, a chip test step is further implemented; wherein the chip test step is implemented by moving a plurality of probes of the probe card to the chips according to the wafer coordinate information,
wherein the chip has a plurality of first bonding pads disposed on a surface of the chip,
wherein each of the first bonding pads has a probe needle region and a non-needle region, and the probes are respectively aligned with the probe needle regions of the first bonding pads.
|