US 12,255,101 B2
Ion implantation of nanostructures for nano-FET
Yu-Chang Lin, Hsinchu (TW); Chun-Feng Nieh, Hsinchu (TW); Huicheng Chang, Tainan (TW); and Yee-Chia Yeo, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jan. 2, 2024, as Appl. No. 18/401,780.
Application 18/401,780 is a continuation of application No. 17/824,610, filed on May 25, 2022, granted, now 11,901,235.
Application 17/824,610 is a continuation of application No. 17/119,102, filed on Dec. 11, 2020, granted, now 11,348,835, issued on May 31, 2022.
Claims priority of provisional application 63/059,218, filed on Jul. 31, 2020.
Prior Publication US 2024/0136228 A1, Apr. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/775 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01)
CPC H01L 21/823412 (2013.01) [H01L 21/823431 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 29/0669 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/775 (2013.01); H01L 29/785 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a stack of alternating layers of a first semiconductor material and a second semiconductor material over a substrate;
forming a dummy gate structure over the stack;
implanting first dopants in a first layer of the stack adjacent the dummy gate structure, the first dopants extending under the dummy gate structure;
removing portions of the first layer to expose portions of a second layer of the stack, a first channel portion of the first layer remaining under the dummy gate structure, wherein remaining portions of the first dopants in the first channel portion form a first doped channel junction, wherein the first layer and the second layer are layers of the first semiconductor material;
implanting second dopants in the second layer of the stack adjacent the dummy gate structure, the second dopants extending under the dummy gate structure, the first dopants and the second dopants having a same conductivity type;
removing portions of the second layer of the stack, a second channel portion of the second layer remaining under the dummy gate structure, wherein remaining portions of the second dopants in the second channel portion form a second doped channel junction; and
forming a source/drain region contacting the first channel portion and the second channel portion.