US 12,255,074 B2
Selective etching method and semiconductor structure manufactured using the same
Kuan-Da Huang, Hsinchu (TW); Chun-Fu Kuo, Hsinchu (TW); Yi-Hsing Yu, Hsinchu (TW); and Li-Te Lin, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jun. 9, 2022, as Appl. No. 17/836,452.
Prior Publication US 2023/0402287 A1, Dec. 14, 2023
Int. Cl. H01L 21/308 (2006.01); H01L 21/02 (2006.01); H01L 21/3065 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01)
CPC H01L 21/3083 (2013.01) [H01L 21/02057 (2013.01); H01L 21/3065 (2013.01); H01L 21/823431 (2013.01); H01L 21/823821 (2013.01); H01L 27/0924 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/6681 (2013.01); H01L 29/785 (2013.01); H01L 29/0657 (2013.01); H01L 29/41775 (2013.01); H01L 29/42392 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor structure, comprising:
forming a semiconductor portion which has an exposed region;
forming two fin sidewalls which are disposed at two opposite sides of the exposed region of the semiconductor portion, and which include a dielectric material; and
performing an etching process such that the exposed region of the semiconductor portion is etched away to form a recess while a protection layer is formed to protect each of the fin sidewalls during the etching process, the protection layer including titanium nitride, zirconium nitride, hafnium nitride, boron nitride, tantalum nitride, aluminum nitride, tungsten nitride, yttrium nitride, vanadium nitride, niobium nitride, copper nitride, or combinations thereof.