US 12,254,950 B2
Dies, semiconductor package structures, enable pin configuration methods and memories
Yingjun Wu, Hubei (CN); Huabin Yan, Hubei (CN); Dong He, Hubei (CN); and Lei You, Hubei (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Hubei (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on Dec. 30, 2022, as Appl. No. 18/148,875.
Application 18/148,875 is a continuation of application No. PCT/CN2022/137657, filed on Dec. 8, 2022.
Prior Publication US 2024/0194227 A1, Jun. 13, 2024
Int. Cl. G11C 7/00 (2006.01); G11C 7/10 (2006.01)
CPC G11C 7/1039 (2013.01) [G11C 7/1063 (2013.01); G11C 7/109 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A die comprising a peripheral circuit, the peripheral circuit configured to:
receive control commands, the control commands for indicating the die to determine an address of the die;
generate indication information for M dies based on the control commands, the indication information to include address encoding information of the M dies, the indication information being used for indicating the M dies to share a same enable pin, M being a positive integer greater than or equal to 1;
determine the address of a die of the M dies based on the indication information, wherein to determine the address further includes to decode the indication information to produce a first encoded value based on a number of dies sharing the same enable pin and to decode the first encoded value to obtain the address of the die; and
send the address of the die to a main control chip, the main control chip to enable the die via an enable signal provided by the same enable pin to the address.