US 12,254,928 B2
Operation method for memory device
Yi-Chen Fan, Hsinchu County (TW); and Chieh-Yen Wang, Hsinchu County (TW)
Assigned to Winbond Electronics Corp., Taichung (TW)
Filed by Winbond Electronics Corp., Taichung (TW)
Filed on May 3, 2023, as Appl. No. 18/311,248.
Claims priority of application No. 112105503 (TW), filed on Feb. 16, 2023.
Prior Publication US 2024/0282380 A1, Aug. 22, 2024
Int. Cl. G11C 16/10 (2006.01); G11C 16/16 (2006.01); G11C 16/24 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/102 (2013.01) [G11C 16/16 (2013.01); G11C 16/24 (2013.01); G11C 16/3459 (2013.01)] 10 Claims
OG exemplary drawing
 
1. An operation method for a memory device, wherein a memory block of the memory device comprises an array of memory cells including cell strings and cell pages, serially numbered and arranged bit lines are connected to the cell strings respectively, serially numbered and arranged word lines are connected to the cell pages respectively, and the operation method comprises:
performing a batch writing to each of the cell pages, such that the memory cells in each cell page are respectively grouped as an earlier written memory cell or a later written memory cell, depending on the connected bit line is either even-numbered or odd-numbered, wherein each cell page has a respective write sequence, each cell page is identical in terms of write sequence with one of 2 nearest cell pages, and opposite in terms of write sequence to the other of the 2 nearest cell pages.