US 12,254,916 B2
Memory device
Chih-Jen Chen, Kaohsiung (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Dec. 9, 2022, as Appl. No. 18/078,106.
Prior Publication US 2024/0194240 A1, Jun. 13, 2024
Int. Cl. G11C 7/00 (2006.01); G11C 11/406 (2006.01); G11C 11/4074 (2006.01)
CPC G11C 11/40615 (2013.01) [G11C 11/40618 (2013.01); G11C 11/4074 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a fuse voltage generator, configured to generate a fuse voltage in response to an enable signal having a first logic level, and stop generating the fuse voltage in response to the enable signal having a second logic level;
a fuse storage, coupled to the fuse voltage generator, configured to storage a setting data of the memory device, and output the setting data in response to the fuse voltage; and
a logic circuit, coupled to the fuse voltage generator, configured to determine a logic level of the enable signal in response to at least two operating signals,
wherein the at least two operating signal includes a refresh signal and a mode signal, and
wherein the logic circuit generates the enable signal in response to the refresh signal and the mode signal.