US 12,254,840 B2
DA converter circuit, electro-optical device, and electronic apparatus
Hitoshi Ota, Shiojiri (JP)
Assigned to SEIKO EPSON CORPORATION, Tokyo (JP)
Filed by SEIKO EPSON CORPORATION, Tokyo (JP)
Filed on Feb. 29, 2024, as Appl. No. 18/592,413.
Claims priority of application No. 2023-031800 (JP), filed on Mar. 2, 2023.
Prior Publication US 2024/0296798 A1, Sep. 5, 2024
Int. Cl. G09G 3/3275 (2016.01); G09G 3/3266 (2016.01)
CPC G09G 3/3266 (2013.01) [G09G 3/3275 (2013.01); G09G 2300/0828 (2013.01); G09G 2310/0289 (2013.01); G09G 2310/08 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A DA converter circuit comprising:
a first DA converter circuit including a first capacitance element, the first DA converter circuit being configured to output a voltage corresponding to a high-order bit of a plurality of bits to a first data line;
a second DA converter circuit including a second capacitance element, the second DA converter circuit being configured to output a voltage corresponding to a low-order bit of the plurality of bits to a second data line; and
a coupling capacitor including one end coupled to the second data line and the other end coupled to the first data line, wherein
the first capacitance element includes
a first electrode electrically coupled to the first data line,
a second electrode, and
a first insulating layer provided between the first electrode and the second electrode, and
the second capacitance element includes
a third electrode electrically coupled to the second data line,
a fourth electrode, and
a second insulating layer provided between the third electrode and the fourth electrode and having a thickness smaller than a thickness of the first insulating layer.