CPC G09G 3/32 (2013.01) [G09G 2310/0245 (2013.01); G09G 2320/0209 (2013.01); G09G 2330/021 (2013.01)] | 20 Claims |
1. A display panel, comprising:
a first display region and a second display region; and
a pixel circuit comprising a first pixel circuit and a second pixel circuit, wherein the first pixel circuit is connected to a light-emitting element in the first display region, and the second pixel circuit is connected to a light-emitting element in the second display region;
wherein in at least one stage of a working process of the display panel, the light-emitting element in the first display region works in a first brightness mode, the light-emitting element in the second display region works in a second brightness mode, brightness in the first brightness mode is L1, and brightness in the second brightness mode is L2, wherein L1≠L2;
wherein the pixel circuit comprises a drive transistor and a bias adjustment module, the a bias adjustment module is connected to a first electrode of the drive transistor or a second electrode of the drive transistor and configured to provide a bias adjustment signal for the drive transistor; the bias adjustment module in the first pixel circuit is configured to receive a first bias adjustment signal Vb1, and the bias adjustment module in the second pixel circuit is configured to receive a second bias adjustment signal Vb2; wherein Vb1≠Vb2;
and/or
wherein the pixel circuit comprises an initialization module, and the initialization module is connected to the light-emitting element and configured to provide an initialization signal for the light-emitting element; the initialization module in the first pixel circuit is configured to provide a first initialization signal Vi1, and the initialization module in the second pixel circuit is configured to provide a second initialization signal Vi2; wherein Vi1≠Vi2.
|