| CPC G09G 3/20 (2013.01) [G09G 2300/0452 (2013.01); G09G 2300/0819 (2013.01); G09G 2310/0286 (2013.01); G09G 2330/021 (2013.01)] | 18 Claims |
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1. A display apparatus comprising:
a display panel including gate lines, data lines, and pixels connected to the gate lines and the data lines;
a gate driver configured to drive the gate lines of the display panel, the gate driver including a plurality of gate stages that are connected to a power line that supplies an output voltage to the plurality of gate stages; and
a comparator circuit coupled with the gate driver through a feedback line, the comparator circuit configured to compare a first divided voltage of a first node of the comparator circuit that is based on a feedback current in the feedback line and a second divided voltage of a second node of the comparator circuit that is based on a reference voltage, and supply the output voltage to a third node of the comparator circuit that is connected to the power line, the output voltage based on the comparison between the first divided voltage and the second divided voltage,
wherein the gate driver further comprises at least one monitoring stage that is connected to the power line,
wherein the at least one monitoring stage comprises:
a Q node having a voltage level;
a QB node having a voltage level that is opposite the voltage level of the Q node;
a power input terminal connected to the power line, the power input terminal configured to receive the output voltage of the third node as a first source voltage through the power line;
an inverter circuit configured to couple the power input terminal with the QB node and supply the first source voltage to the QB node while the power input terminal is coupled with the QB node and while the Q node is deactivated; and
at least one pull-down transistor including a gate electrode coupled with the QB node, a drain electrode coupled with the feedback line at an output node of the at least one monitoring stage, and a source electrode that receives a second source voltage.
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