| CPC G06F 9/4406 (2013.01) [G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01)] | 20 Claims |

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1. An information handling system, comprising:
a central processing unit (CPU);
one or more peripheral component interconnect express (PCIe) devices communicatively coupled to the CPU via one or more PCIe busses; and
non-transitory computer readable media including processor executable instructions that, when executed by a processor, cause the information handling system to perform PCI operations including:
responsive to enumerating a PCIe device and adding the PCIe device to a configuration space of a platform, adding a mapping entry to a device handler mapping table, wherein the mapping entry associates a device handler for the PCIe device with information for accessing the PCIe device; and
responsive to a device detection failure for the PCIe device:
creating a virtual pseudo PCIe (VPP) node corresponding to the PCIe device;
enumerating the VPP node to enable boot to complete; and
responsive to subsequently detecting and enumerating the PCIe device, connecting the VPP node and the PCIe device without re-booting the information handling system.
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