US 12,254,300 B2
Merging buffer access operations in a coarse-grained reconfigurable computing system
David Alan Koeplinger, Palo Alto, CA (US); Adam Bordelon, Palo Alto, CA (US); Weihang Fan, Mountain View, CA (US); Kevin Brown, Palo Alto, CA (US); and Weiwei Chen, Palo Alto, CA (US)
Assigned to SambaNova Systems, Inc., Palo Alto, CA (US)
Filed by SambaNova Systems, Inc., Palo Alto, CA (US)
Filed on Oct. 27, 2022, as Appl. No. 17/974,910.
Claims priority of provisional application 63/328,128, filed on Apr. 6, 2022.
Prior Publication US 2023/0325312 A1, Oct. 12, 2023
Int. Cl. G06F 8/41 (2018.01)
CPC G06F 8/45 (2013.01) [G06F 8/433 (2013.01); G06F 8/4441 (2013.01); G06F 2212/1041 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A system for merging buffers and associated operations in a reconfigurable computing environment, the system comprising:
an allocation module configured to receive a compute graph for a reconfigurable dataflow computing system, the compute graph comprising operation nodes that specify operations and edges that specify producer and consumer relationships between operations;
the allocation module configured to conduct a buffer allocation and merging process responsive to determining that a first operation specified by a first operation node is a memory indexing operation and that the first operation node is a producer for exactly one consuming node that specifies a second operation; and
wherein the buffer allocation and merging process comprises allocating a merged buffer node and replacing the first operation node and the exactly one consuming node with the merged buffer node within the compute graph responsive to determining that the first operation and the second operation can be merged into a merged indexing operation and responsive to determining that a resource cost of the merged buffer node is less than a sum of resource costs for separate buffer nodes for the first operation and the second operation.