| CPC G06F 3/0619 (2013.01) [G06F 3/065 (2013.01); G06F 3/0673 (2013.01)] | 18 Claims |

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1. A memory device comprising:
a bus interface configured to be coupled to a memory bus;
a volatile random-access memory (RAM) portion comprising an active portion and a reserved portion;
a snapshot manager circuit coupled to the bus interface and the volatile RAM portion and configured to:
take a snapshot of changed portions of the active portion; and
update a management table with information relating to the snapshot; and
a hardware memory address remapping circuit coupled to the memory, snapshot manager, and bus interface.
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