US 12,253,958 B2
System for address mapping and translation protection
Ravi L. Sahita, Portland, OR (US); Gilbert Neiger, Portland, OR (US); Vedvyas Shanbhogue, Austin, TX (US); David M. Durham, Beaverton, OR (US); Andrew V. Anderson, Forest Grove, OR (US); David A. Koufaty, Portland, OR (US); Asit K. Mallick, Saratoga, CA (US); Arumugam Thiyagarajah, Folson, CA (US); Barry E. Huntley, Hillsboro, OR (US); Deepak K. Gupta, Hillsboro, OR (US); Michael Lemay, Hillsboro, OR (US); Joseph F. Cihula, Hillsboro, OR (US); and Baiju V. Patel, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Oct. 7, 2021, as Appl. No. 17/496,327.
Application 17/496,327 is a continuation of application No. 16/686,379, filed on Nov. 18, 2019.
Application 16/686,379 is a continuation of application No. 15/088,739, filed on Apr. 1, 2016, granted, now 10,515,023, issued on Dec. 24, 2019.
Claims priority of provisional application 62/301,403, filed on Feb. 29, 2016.
Prior Publication US 2022/0027287 A1, Jan. 27, 2022
Int. Cl. G06F 12/00 (2006.01); G06F 9/455 (2018.01); G06F 12/1009 (2016.01); G06F 12/1027 (2016.01); G06F 12/14 (2006.01); G06F 21/78 (2013.01)
CPC G06F 12/145 (2013.01) [G06F 9/45533 (2013.01); G06F 12/1009 (2013.01); G06F 12/1027 (2013.01); G06F 21/78 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/1052 (2013.01); G06F 2212/151 (2013.01); G06F 2212/656 (2013.01); G06F 2212/657 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A system, comprising:
memory circuitry; and
processing circuitry coupled to the memory circuitry and including a virtual machine manager (VMM), the processing circuitry to:
execute one or more instructions of a virtual machine in which an operating system is to execute;
based on a first determination that a first guest linear address (GLA) received in a first memory access command from the virtual machine is one of a plurality of protected linear addresses, use a first page table managed by the VMM to convert the first GLA to a first physical address; and
based on a second determination that a second guest linear address (GLA) received in a second memory access command from the virtual machine is not one of the plurality of protected linear addresses, use a second page table managed by the operating system to convert the second GLA to a second physical address.