| CPC G06F 12/0292 (2013.01) [G06F 2212/7201 (2013.01)] | 14 Claims |
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1. A memory controller of a storage device, comprising:
a controller memory for storing a logical-to-physical (L2P) address mapping table corresponding to a file; and
a controller processor configured to control a memory device of the storage device, receive a mapping update command from a host, and update the L2P address mapping table according to the mapping update command by:
replacing original logical addresses of logical block address (LBA) segments of the file with new continuous logical addresses of a merged LBA segment of the file, and
changing an original mapping relation between the original logical addresses of the LBA segments of the file and physical addresses of the file, to a new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file,
wherein the L2P address mapping table is stored in a volatile controller memory in the controller memory; and
the controller processor is further configured to transmit the updated L2P address mapping table to a physical data block of the memory device and transmit an instruction to the host acknowledging that the L2P address mapping table has been updated in the physical data block of the memory device,
wherein the controller processor is configured to generate a merge log by recording the new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file and transmit the merge log to the physical data block of the memory device,
wherein the merge log stored in the physical data block updates faster than the L2P address mapping table stored in the physical data block.
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