| CPC G02F 1/1368 (2013.01) [G02F 1/13454 (2013.01); G02F 1/136209 (2013.01); G02F 1/13624 (2013.01); H01L 27/1225 (2013.01); H01L 27/1237 (2013.01); H01L 27/1251 (2013.01); G02F 1/13685 (2021.01); G02F 2202/104 (2013.01); H01L 29/78675 (2013.01); H01L 29/7869 (2013.01)] | 10 Claims |

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1. A substrate assembly, comprising:
a substrate;
a first transistor disposed on the substrate, wherein the first transistor comprises a first semiconductor layer and a first drain electrode electrically connected to the first semiconductor layer, and the first semiconductor layer is a silicon semiconductor layer;
a second transistor disposed on the substrate, wherein the second transistor comprises a second semiconductor layer, a second source electrode and a second drain electrode electrically connected to the second semiconductor layer, and the second semiconductor layer is an oxide semiconductor layer;
a first insulating layer disposed under the first semiconductor layer;
a second insulating layer disposed on the first semiconductor layer;
a first buffer layer disposed between the substrate and the first insulating layer;
a second buffer layer disposed between the substrate and the first buffer layer;
wherein a ratio of a thickness of the first insulating layer to a thickness of the second insulating layer is greater than or equal to 1.25 and less than or equal to 4;
wherein the first insulating layer comprises silicon oxide, the first buffer layer comprises silicon nitride, and the second buffer layer comprises silicon oxide;
wherein the first drain electrode is electrically connected to the second source electrode.
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