US 12,253,778 B2
Display panel, circuit board and display device
Bin Wan, Beijing (CN); Xun Pu, Beijing (CN); Xiaoyuan Wang, Beijing (CN); and Junming Chen, Beijing (CN)
Assigned to CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Chongqing (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 18/261,879
Filed by CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Chongqing (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Aug. 30, 2022, PCT No. PCT/CN2022/115770
§ 371(c)(1), (2) Date Jul. 18, 2023,
PCT Pub. No. WO2024/044946, PCT Pub. Date Mar. 7, 2024.
Prior Publication US 2024/0393649 A1, Nov. 28, 2024
Int. Cl. G02F 1/1345 (2006.01); G02F 1/1362 (2006.01)
CPC G02F 1/136286 (2013.01) [G02F 1/136204 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display panel, comprising:
a base substrate, comprising a display region and a peripheral region;
a first pad region, located in the peripheral region and comprising at least one first pad, wherein the at least one first pad is configured to be electrically connected to a first integrated circuit;
a second pad region, located in the peripheral region and comprising at least one second pad, wherein the at least one second pad is configured to be electrically connected to a second integrated circuit;
a third pad region, located in the peripheral region and comprising a plurality of third pads, wherein the plurality of third pads are configured to be electrically connected to a circuit board, and the third pad region is located on a side of the first pad region and the second pad region away from the display region;
a plurality of sub-pixels, located in the display region, wherein the plurality of sub-pixels comprises a common electrode;
a common signal line, electrically connected to the common electrode, wherein the common signal line is located in the peripheral region and extends along a first direction, the first pad region and the second pad region are located on both sides of the common signal line in a second direction, and the first direction intersects with the second direction,
wherein the display panel further comprises at least one first signal line and at least one second signal line, the at least one first pad is electrically connected to a first portion of the plurality of third pads through the at least one first signal line, the at least one second pad is electrically connected to a second portion of the plurality of third pads through the at least one second signal line, and the common signal line is electrically connected to an output terminal of the circuit board through a third portion of the plurality of third pads; and
the at least one first signal line and the at least one second signal line are configured to be electrically connected to each other through the circuit board and the third pads.