| CPC G02F 1/133621 (2013.01) [G02F 1/136213 (2013.01); G02F 1/13624 (2013.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01); G09G 3/3659 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01); G02F 2202/10 (2013.01); G09G 3/342 (2013.01); G09G 3/3655 (2013.01); G09G 3/3688 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0443 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/024 (2013.01); G09G 2310/0251 (2013.01); G09G 2310/0297 (2013.01); G09G 2320/0238 (2013.01); G09G 2320/0252 (2013.01); G09G 2320/0257 (2013.01); G09G 2320/0261 (2013.01); G09G 2320/028 (2013.01); G09G 2340/02 (2013.01); G09G 2340/0435 (2013.01); G09G 2340/16 (2013.01)] | 4 Claims |

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1. A transmissive liquid crystal display device comprising:
a plurality of pixels arranged in a matrix, one of the plurality of pixels comprising:
a first transistor;
a second transistor;
a third transistor;
a first pixel electrode; and
a second pixel electrode,
wherein the transmissive liquid crystal display device comprises:
a first conductive layer comprising a first region configured to function as one of a source and a drain of the first transistor and a second region configured to function as a source wiring;
a second conductive layer comprising a first region configured to function as the other of the source and the drain of the first transistor and a second region in contact with the first pixel electrode;
a third conductive layer comprising a first region configured to function as one of a source and a drain of the second transistor, a second region configured to function as one of a source and a drain of the third transistor, and a third region in contact with the second pixel electrode; and
a fourth conductive layer comprising a first region configured to function as a gate of the first transistor, a second region configured to function as a gate of the second transistor, a third region configured to function as a gate of the third transistor, and a fourth region configured to function as a gate wiring,
wherein the other of the source and the drain of the third transistor is electrically connected to a wiring,
wherein the first transistor, the second transistor, and the third transistor are configured to be turned on at the same time,
wherein the first pixel electrode has a light-transmitting property,
wherein the second pixel electrode has a light-transmitting property,
wherein a potential of the source wiring is supplied to the first pixel electrode,
wherein the potential of the source wiring is supplied to the other of the source and the drain of the second transistor, and
wherein a potential obtained by dividing a potential difference between a potential of the other of the source and the drain of the second transistor and a potential of the wiring on the basis of a value of on-resistance of the second transistor and a value of on-resistance of the third transistor is supplied to the second pixel electrode.
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