| CPC G01L 9/12 (2013.01) [B81B 7/0058 (2013.01); B81B 7/007 (2013.01); G01L 9/02 (2013.01); H03M 3/414 (2013.01); H03M 3/458 (2013.01); B81B 2201/0264 (2013.01); H03M 3/438 (2013.01)] | 20 Claims |

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1. A sensor system comprising:
a sensor comprising a sense capacitor with a variable sense capacitance;
a readout integrated circuit comprising an analog to digital converter (ADC) having an ADC input connected to the sense capacitor, and
an offset capacitor operatively charged and discharged out of phase with respect to the sense capacitor;
wherein:
a variable parasitic capacitance is able to be coupled to the ADC input;
when an input pressure is sensed by the sensor, the variable sense capacitance is modulated, thereby generating one or more ADC output signals in correspondence of the input pressure, and
undesired charges due to the variable parasitic capacitance:
are sampled before a charging phase in which a reference voltage is sampled to store charges across the sense capacitor; and
are compensated for during an integration phase in which the ADC output signals are generated by an integration of the charges stored across the sense capacitor.
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