US 11,930,677 B2
Display panel with resistance-reducing trace and signal line configured to reduce peel-off, and fabricating method thereof, and displaying device
Yongchao Huang, Beijing (CN); Can Yuan, Beijing (CN); Liusong Ni, Beijing (CN); Chao Wang, Beijing (CN); Jiawen Song, Beijing (CN); Zhiwen Luo, Beijing (CN); Jun Liu, Beijing (CN); Leilei Cheng, Beijing (CN); Qinghe Wang, Beijing (CN); and Tao Sun, Beijing (CN)
Assigned to HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., Anhui (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed by Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Filed on May 25, 2021, as Appl. No. 17/329,349.
Claims priority of application No. 202011090160.1 (CN), filed on Oct. 13, 2020.
Prior Publication US 2022/0115493 A1, Apr. 14, 2022
Int. Cl. H10K 59/131 (2023.01); H10K 59/12 (2023.01); H10K 59/126 (2023.01); H10K 59/38 (2023.01); H10K 71/00 (2023.01)
CPC H10K 59/1315 (2023.02) [H10K 59/126 (2023.02); H10K 59/38 (2023.02); H10K 71/00 (2023.02); H10K 59/1201 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A display panel, wherein the display panel comprises:
a substrate, wherein the substrate is divided into a plurality of sub-pixel regions and a pixel separating region located between two neighboring columns of the sub-pixel regions;
a resistance reducing trace, wherein the resistance reducing trace is provided on the pixel separating region of the substrate;
an inter-layer-medium layer, wherein the inter-layer-medium layer is provided on the substrate, and the inter-layer-medium layer has an opening exposing the resistance reducing trace; and
a signal line, wherein the signal line is provided within the opening, the signal line is connected to the resistance reducing trace, the signal line is distributed in a column direction along the display panel, and in a row direction along the display panel, a width of the opening is greater than or equal to a width of the signal line.