US 11,929,772 B2
Circuit configured to compensate for timing skew and operation method thereof
Changkyu Seol, Osan-si (KR); Byung-Suk Woo, Hwaseong-si (KR); and Sucheol Lee, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Sep. 30, 2021, as Appl. No. 17/490,563.
Claims priority of application No. 10-2021-0014311 (KR), filed on Feb. 1, 2021.
Prior Publication US 2022/0247438 A1, Aug. 4, 2022
Int. Cl. H04B 1/10 (2006.01); H04B 1/00 (2006.01); H04B 17/21 (2015.01); H04B 17/29 (2015.01)
CPC H04B 1/1018 (2013.01) [H04B 1/0007 (2013.01); H04B 1/1027 (2013.01); H04B 17/21 (2015.01); H04B 17/29 (2015.01)] 19 Claims
OG exemplary drawing
 
1. An electronic circuit which converts a receive signal being analog into reception data being digital, the electronic circuit comprising:
a delay circuit configured to receive a first receive signal and to output a reference signal, the reference signal being generated by delaying the first receive signal as much as one of a plurality of different timing delays respectively set to a plurality of loops;
a sampler configured to receive a second receive signal and to sample the second receive signal based on the reference signal in each of the plurality of loops;
a timing skew estimation circuit configured to output a compensation signal for compensating for a timing skew by determining a metric value indicating a statistical characteristic of a plurality of sample data sampled through the sampler and estimating the timing skew based on the determined metric value; and
a controller configured to control an operation of the timing skew estimation circuit,
wherein the timing skew estimation circuit includes:
a metric calculator configured to calculate the metric value indicating the statistical characteristic of the plurality of the sample data;
an accumulator configured to accumulate the metric value; and
decision logic configured to estimate the timing skew based on an output value of the accumulator.