US 11,929,766 B2
Obtaining accurate timing of analog to digital converter samples in cellular modem
Lennart Karl-Axel Mathe, San Diego, CA (US); Brian Clarke Banister, San Diego, CA (US); Christos Komninakis, Solana Beach, CA (US); and Minkui Liu, San Diego, CA (US)
Assigned to QUALCOMM INCORPORATED, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Apr. 15, 2022, as Appl. No. 17/659,468.
Prior Publication US 2023/0336192 A1, Oct. 19, 2023
Int. Cl. H04B 1/26 (2006.01); H04B 1/00 (2006.01); H04B 1/403 (2015.01); H04B 1/58 (2006.01)
CPC H04B 1/0007 (2013.01) [H04B 1/0053 (2013.01); H04B 1/403 (2013.01); H04B 1/588 (2013.01)] 27 Claims
OG exemplary drawing
 
1. A method for determining an analog-to-digital converter (ADC) output timing in a user equipment, comprising:
operating a switch in a first mode to route a system clock from an oscillator to an input of the ADC;
determining a first ADC output timing based on a first set of ADC samples generated by the ADC;
operating the switch in a second mode to route analog signals from a transceiver of the user equipment to the input of the ADC; and
obtaining a second set of ADC samples generated by the ADC based on the analog signals.