US 11,929,449 B2
Solar cell, manufacturing method thereof, and photovoltaic module
Kun Yu, Zhejiang (CN); Changming Liu, Zhejiang (CN); and Xinyu Zhang, Zhejiang (CN)
Assigned to SHANGHAI JINKO GREEN ENERGY ENTERPRISE MANAGEMENT CO., LTD., Shanghai (CN); and ZHEJIANG JINKO SOLAR CO., LTD., Zhejiang (CN)
Filed by SHANGHAI JINKO GREEN ENERGY ENTERPRISE MANAGEMENT CO., LTD., Shanghai (CN); and ZHEJIANG JINKO SOLAR CO., LTD., Zhejiang (CN)
Filed on Apr. 10, 2023, as Appl. No. 18/132,796.
Application 17/964,190 is a division of application No. 17/459,689, filed on Aug. 27, 2021, granted, now 11,581,454, issued on Feb. 14, 2023.
Application 18/132,796 is a continuation of application No. 17/964,190, filed on Oct. 12, 2022, granted, now 11,824,136.
Claims priority of application No. 202110895225.8 (CN), filed on Aug. 4, 2021.
Prior Publication US 2023/0246116 A1, Aug. 3, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 31/0236 (2006.01); H01L 31/0368 (2006.01); H01L 31/068 (2012.01); H01L 31/18 (2006.01)
CPC H01L 31/1868 (2013.01) [H01L 31/02366 (2013.01); H01L 31/03685 (2013.01); H01L 31/068 (2013.01); H01L 31/1824 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A solar cell, comprising:
an N-type semiconductor substrate, wherein a rear surface of the N-type semiconductor substrate includes a non-pyramid-shaped microstructure, and the non-pyramid-shaped microstructure includes two or more first substructures at least partially stacked on one another and two or more second substructures adjacent to one another and not stacked on one another, a top surface of the first substructure and a top surface of second first substructure are both a polygonal plane; and wherein a front surface of the N-type semiconductor substrate includes a pyramid-shaped microstructure, the pyramid-shaped microstructure includes a top portion away from the front surface of the semiconductor substrate and a bottom portion close to the front surface of the semiconductor substrate, and in a direction away from the front surface and perpendicular to the front surface, a distance between the top portion and the bottom portion of the pyramid-shaped microstructure is less than or equal to 5 μm;
a first passivation layer located on the pyramid-shaped microstructure of the front surface of the N-type semiconductor substrate;
a tunnel oxide layer located on the non-pyramid-shaped microstructure of the rear surface of the N-type semiconductor substrate;
a doped conductive layer located on a surface of the tunnel oxide layer; and
a second passivation layer located on a surface of the doped conductive layer.