CPC H01L 29/66439 (2013.01) [H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/775 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |
1. A semiconductor device, comprising:
a substrate:
first and second source/drain (S/D) regions disposed on the substrate, wherein each of the first and second S/D regions comprises a stack of first and second semiconductor layers arranged in an alternating configuration and an epitaxial region disposed on the stack of first and second semiconductor layers;
nanostructured channel regions disposed between the first and second S/D regions;
a passivation layer, wherein a first portion of the passivation layer is disposed between the epitaxial region and the stack of first and second semiconductor layers and a second portion of the passivation layer is disposed on sidewalls of the nanostructured channel regions and
a nanosheet (NS) structure wrapped around the nanostructured channel regions.
|