US 11,929,319 B2
Integrated fan-out packages and methods of forming the same
Ching-Yu Huang, Hsinchu (TW); Han-Ping Pu, Taichung (TW); Ming-Kai Liu, Hsinchu (TW); Ting-Chu Ko, Hsinchu (TW); Yung-Ping Chiang, Hsinchu County (TW); Chang-Wen Huang, Hsinchu (TW); and Yu-Sheng Hsieh, New Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 22, 2021, as Appl. No. 17/382,371.
Application 17/382,371 is a division of application No. 16/035,723, filed on Jul. 16, 2018, granted, now 11,075,159.
Prior Publication US 2021/0351126 A1, Nov. 11, 2021
Int. Cl. H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 23/538 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/56 (2013.01); H01L 21/76873 (2013.01); H01L 23/3157 (2013.01); H01L 23/53238 (2013.01); H01L 23/5381 (2013.01); H01L 23/5383 (2013.01); H01L 24/09 (2013.01); H01L 24/14 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/0401 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming an integrated fan-out package, comprising:
forming a seed layer over two dies and over an encapsulant between the two dies;
forming a first photoresist layer on the seed layer;
forming a first metal line by using the seed layer as a seed;
removing the first photoresist layer;
forming a second photoresist layer on the seed layer;
forming a plurality of first vias over the two dies by using the first metal line as a seed and forming a plurality of first dummy vias over the encapsulant by using the seed layer as a seed; and
removing the second photoresist layer.