US 11,928,066 B2
I2C bridge device
Jasper Van Bourgognie, Berchem (BE); Vianney Le Clément de Saint-Marcq, Brussels (BE); Riemer Grootjans, Antwerp (BE); and Peter Verstraeten, Sint-Martens-Latem (BE)
Assigned to IRISTICK NV, Sint-Martens-Latem (BE)
Appl. No. 16/470,264
Filed by Iristick NV, Sint-Martens-Laten (BE)
PCT Filed Dec. 15, 2017, PCT No. PCT/EP2017/083003
§ 371(c)(1), (2) Date Jun. 17, 2019,
PCT Pub. No. WO2018/109160, PCT Pub. Date Jun. 21, 2018.
Claims priority of application No. 16204429 (EP), filed on Dec. 15, 2016.
Prior Publication US 2020/0012611 A1, Jan. 9, 2020
Int. Cl. G06F 13/40 (2006.01); G06F 13/42 (2006.01); H04L 5/14 (2006.01)
CPC G06F 13/4045 (2013.01) [G06F 13/4031 (2013.01); G06F 13/4291 (2013.01); H04L 5/14 (2013.01); G06F 2213/0016 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A bridge device operable between a master device and a slave device of a communication system, said master device and said slave device arranged for communicating with each other via a parent I2C bus and a child I2C bus and using the I2C protocol, said bridge device comprising
a parent module at one side of said bridge device, said parent module arranged for connecting said parent I2C bus and comprising a parent I2C transmitter/receiver device and a parent module state machine,
a child module at the opposite side of said bridge device, said child module arranged for connecting said child I2C bus and comprising a child I2C transmitter/receiver device and a child module state machine,
whereby said parent module and said child module each comprise an internal bridge interface to exchange messages between said parent module and said child module, said messages being generated by said parent module state machine or said child module state machine in response to a change of state caused by an event on their respective I2C buses,
whereby said parent module and said child module are each arranged for translating an I2C event to a message and for forwarding said message to the module at the other side of the bridge device via said internal bridge interfaces, said module at the other side being arranged for further transmitting said message as an I2C event towards the I2C bus at the other side of the bridge device, and
whereby said parent module and said child module are further each arranged for holding the communication towards the respective I2C bus by stretching a clock line on their respective I2C bus until a message, based on an event occurring on the I2C bus at the other side of the bridge device and instructing continuation of the communication, is received via said internal bridge interfaces from the module at the other side of the bridge device,
wherein the bridge device buffers a single I2C byte from the master device and holds the communication on the master device by stretching the clock line on the I2C bus of the parent module until the bridge device has received a response from the slave device, or wherein the bridge device buffers a single I2C byte from the slave device and holds the communication on the slave device by stretching the clock line on the I2C bus of the child module until the bridge device has received a response from the master device;
whereby said I2C protocol is not a Layered I2C protocol.