US 11,927,620 B2
Method for simulating electricity of wafer chip
Hongxiang Li, Hefei (CN); and Shih-Shin Wang, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Sep. 17, 2021, as Appl. No. 17/477,792.
Application 17/477,792 is a continuation of application No. PCT/CN2021/103927, filed on Jul. 1, 2021.
Claims priority of application No. 202110119730.3 (CN), filed on Jan. 28, 2021.
Prior Publication US 2022/0236317 A1, Jul. 28, 2022
Int. Cl. G01R 31/28 (2006.01); G06F 16/21 (2019.01); G06F 30/36 (2020.01); H01L 21/66 (2006.01)
CPC G01R 31/2831 (2013.01) [G06F 16/21 (2019.01); G06F 30/36 (2020.01); H01L 22/00 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for simulating electricity of a wafer chip, comprising:
constructing a database, the database comprising spectroscopic data of a semiconductor structure of the wafer chip obtained from a target key process, actual electrical data of the wafer chip, and a correspondence between the spectroscopic data and the actual electrical data,
performing the target key process on a target wafer chip to obtain the spectroscopic data of the semiconductor structure of the target wafer chip obtained from the target key process, the spectroscopic data being target spectroscopic data; and
simulating electrical data of the target wafer chip based on the obtained target spectroscopic data and the database, the electrical data being target electrical data.