US 12,250,855 B2
Semiconductor device
Shunpei Yamazaki, Setagaya (JP); Kengo Akimoto, Atsugi (JP); Shigeki Komori, Isehara (JP); Hideki Uochi, Atsugi (JP); Rihito Wada, Atsugi (JP); and Yoko Chiba, Atsugi (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Sep. 29, 2021, as Appl. No. 17/488,376.
Application 17/488,376 is a continuation of application No. 15/296,270, filed on Oct. 18, 2016, granted, now 11,139,359.
Application 15/296,270 is a continuation of application No. 12/556,593, filed on Sep. 10, 2009, granted, now 9,478,597, issued on Oct. 25, 2016.
Claims priority of application No. 2008-241307 (JP), filed on Sep. 19, 2008.
Prior Publication US 2022/0020841 A1, Jan. 20, 2022
Int. Cl. H01L 29/786 (2006.01); H01L 27/12 (2006.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); H10K 50/82 (2023.01)
CPC H10K 59/131 (2023.02) [H01L 27/1225 (2013.01); H01L 29/7869 (2013.01); H10K 59/1213 (2023.02); H10K 50/82 (2023.02)] 3 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a gate electrode;
a gate insulating layer over the gate electrode;
a first oxide semiconductor layer including indium, gallium and zinc over the gate insulating layer;
a second oxide semiconductor layer comprising indium, gallium and zinc over the first oxide semiconductor layer,
a source electrode electrically connected to the first oxide semiconductor layer;
a drain electrode electrically connected to the first oxide semiconductor layer; and
a pixel electrode electrically connected to one of the source electrode and the drain electrode,
wherein, in a plan view, an entire portion of the first oxide semiconductor layer overlaps with the gate electrode,
wherein the first oxide semiconductor layer comprises an amorphous region, and
wherein the second oxide semiconductor layer comprises a nanocrystal whose grain diameter is larger than or equal to 1 nm and smaller than or equal to 10 nm.