US 12,250,851 B2
Drive circuit array substrate including well taps provided in subset thereof, display device, and electronic apparatus
Tokihiro Yokono, Kanagawa (JP)
Assigned to Sony Group Corporation, Tokyo (JP)
Filed by Sony Group Corporation, Tokyo (JP)
Filed on Apr. 30, 2024, as Appl. No. 18/651,194.
Application 18/651,194 is a continuation of application No. 17/607,602, granted, now 11,997,882, previously published as PCT/JP2021/024514, filed on Jun. 29, 2021.
Claims priority of application No. 2020-119196 (JP), filed on Jul. 10, 2020.
Prior Publication US 2024/0357863 A1, Oct. 24, 2024
Int. Cl. H10K 59/121 (2023.01)
CPC H10K 59/1213 (2023.02) 20 Claims
OG exemplary drawing
 
1. A display device, comprising:
a semiconductor substrate;
a first drive circuit located on the semiconductor substrate;
a second drive circuit located on the semiconductor substrate;
a third drive circuit located on the semiconductor substrate;
a first light emitting element configured to be controlled by the first drive circuit;
a second light emitting element configured to be controlled by the second drive circuit; and
a third light emitting element configured to be controlled by the third drive circuit, wherein
each of the first drive circuit, the second drive circuit, and the third drive circuit respectively include a write transistor, a drive transistor, a first transistor, and a second transistor,
a source region or a drain region of the first transistor of one of the first drive circuit, the second drive circuit or the third drive circuit is electrically connected to an anode electrode of a corresponding one of the first light emitting element, the second light emitting element, or the third light emitting element,
the second transistor of said one of the first drive circuit, the second drive circuit or the third drive circuit is electrically connected between a power supply line and the anode electrode,
the second drive circuit is arranged between the first drive circuit and the third drive circuit,
the second drive circuit is adjacent to the first drive circuit and the third drive circuit,
a first well tap is provided to supply a voltage to a well region of the semiconductor substrate for the first drive circuit, the second drive circuit, and the third drive circuit, and
the first well tap is arranged between a gate electrode of a drive transistor of the first drive circuit and a gate electrode of a drive transistor of the third drive circuit.