| CPC H10B 43/27 (2023.02) [H10B 43/10 (2023.02)] | 10 Claims |

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1. An integrated assembly, comprising:
a first deck having first memory cells arranged in first tiers disposed one atop another;
a second deck over the first deck; the second deck having second memory cells arranged in second tiers disposed one atop another;
a charge-blocking structure extending along the first and second decks; the charge-blocking structure having a first region along the first deck and a second region along the second deck, and having a detectable location where the first region joins to the second region;
a pillar passing through the first and second decks and being adjacent the charge-blocking structure; the pillar comprising a charge-storage material adjacent the charge-blocking structure, a dielectric material adjacent the charge-storage material, and a channel material adjacent the dielectric material; and
wherein the first and second regions of the charge-blocking structure comprise a same composition as one another and comprise different lateral thicknesses relative to one another.
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