| CPC H10B 43/27 (2023.02) [H10B 41/27 (2023.02)] | 19 Claims |

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1. A method of forming a semiconductor structure, comprising:
forming an alternating stack of first material layers and second material layers over a substrate;
forming a hard mask layer over the alternating stack;
applying and patterning a photoresist layer over the hard mask layer, wherein openings are formed in the photoresist layer;
forming cavities in the hard mask layer;
forming a cladding liner on sidewalls of the cavities in the hard mask layer;
forming via openings in the alternating stack by performing an anisotropic etch process that transfers a pattern of the cavities in the hard mask layer through each layer within the alternating stack employing a combination of the cladding liner and the hard mask layer as an etch mask;
forming a memory film and a vertical semiconductor channel in each respective via opening; and
replacing the second material layers with electrically conductive word lines to form a three-dimensional memory device.
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