US 12,250,813 B2
Method of forming memory transistor with sacrificial polysilicon layer
Yu Nakane, Kawasaki Kanagawa (JP); Nobuyuki Toda, Kawasaki Kanagawa (JP); Hiroyoshi Kitahara, Yokohama Kanagawa (JP); Takeshi Yamamoto, Kawasaki Kanagawa (JP); and Naozumi Terada, Kawasaki Kanagawa (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed by Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed on Aug. 7, 2023, as Appl. No. 18/366,353.
Application 18/366,353 is a division of application No. 17/670,999, filed on Feb. 14, 2022.
Claims priority of application No. 2021-152203 (JP), filed on Sep. 17, 2021; and application No. 2021-200121 (JP), filed on Dec. 9, 2021.
Prior Publication US 2023/0389307 A1, Nov. 30, 2023
Int. Cl. H10B 41/30 (2023.01); H01L 29/66 (2006.01); H01L 29/788 (2006.01); H01L 29/792 (2006.01); H10B 43/30 (2023.01)
CPC H10B 41/30 (2023.02) [H01L 29/66825 (2013.01); H01L 29/66833 (2013.01); H01L 29/788 (2013.01); H01L 29/792 (2013.01); H10B 43/30 (2023.02)] 7 Claims
OG exemplary drawing
 
1. A manufacturing method of a semiconductor device comprising a memory transistor having at least a first silicon dioxide film and a first gate electrode positioned on a semiconductor substrate in order, and a MOS transistor having a second silicon dioxide film and a second gate electrode positioned on the semiconductor substrate in order, the method comprising:
a first process of forming at least a first silicon dioxide film and a first gate electrode in a first region of a semiconductor substrate;
a second process of forming a sacrificial polysilicon film in at least a part of a surface region covering the first silicon dioxide film and the first gate electrode;
and a third process of forming a gate dielectric film of a second silicon dioxide film in a second region different from the first region of the semiconductor substrate by performing a thermal oxidization of the second region of the semiconductor substrate along with a region of the sacrificial polysilicon film,
wherein a thickness of the sacrificial polysilicon film before the thermal oxidization is not more than 45 percent of a thickness of the second silicon dioxide film formed by the thermal oxidization.