| CPC H10B 20/20 (2023.02) | 7 Claims |
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1. A method for fabricating a semiconductor device, comprising:
providing a substrate;
forming an isolation layer in the substrate to define an active area of the substrate, wherein the active area comprises a transistor portion and a programmable portion extending from the transistor portion;
forming a buried gate structure in the transistor portion;
forming a drain region in the programmable portion and the transistor portion, and adjacent to the gate structure;
forming a source region in the transistor portion, adjacent to the gate structure, and opposite to the drain region with the buried gate structure interposed therebetween;
forming a middle insulating layer on the programmable portion; and
forming an upper conductive layer on the middle insulating layer;
wherein the drain region in the programmable portion, the middle insulating layer, and the upper conductive layer together configure a programmable structure.
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