US 12,250,803 B2
Device and method for tuning threshold voltage
Chih-Hsuan Chen, Hsinchu (TW); Chia-Hao Pao, Kaohsiung (TW); and Shih-Hao Lin, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTORING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Aug. 30, 2021, as Appl. No. 17/461,572.
Prior Publication US 2023/0066387 A1, Mar. 2, 2023
Int. Cl. H10B 10/00 (2023.01); G11C 11/412 (2006.01)
CPC H10B 10/12 (2023.02) [H10B 10/125 (2023.02); G11C 11/412 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A Static Radom Access Memory (SRAM) cell, comprising:
a pass-gate transistor, wherein the pass-gate transistor includes a first active region extending lengthwise along a first direction and a first gate structure engaging the first active region, wherein the first gate structure extends lengthwise along a second direction perpendicular to the first direction;
a first isolation feature abutting the first gate structure;
a pull-down transistor, wherein the pull-down transistor includes a second active region extending lengthwise along the first direction and a second gate structure engaging the second active region, wherein the second gate structure extends lengthwise along the second direction; and
a second isolation feature abutting the second gate structure and spaced apart from the first gate structure in a top view of the SRAM cell,
wherein the first isolation feature is spaced from the first active region of the pass-gate transistor for a first distance along the second direction, the second isolation feature is spaced from the second active region of the pull-down transistor for a second distance along the second direction that is larger than the first distance, and a bottom surface of the first isolation feature is lower than a bottom surface of the second isolation feature.