CPC H04W 72/23 (2023.01) [H04L 1/0061 (2013.01); H04W 4/40 (2018.02); H04W 76/27 (2018.02); H04W 80/02 (2013.01)] | 3 Claims |
1. An integrated circuit, comprising:
generation circuitry, which, in operation, controls generating a first downlink control information (DCI) and a second DCI; and
transmission circuitry, which, in operation, controls transmitting the first DCI and the second DCI to a first user equipment,
wherein the first DCI includes an activation or release field used for activation or release of Semi Persistent Scheduling (SPS) in addition to all fields of the second DCI, the first DCI being transmitted by a base station separately from the second DCI, the second DCI being used for a communication between the first user equipment and a second user equipment,
wherein the activation or release field indicates to transmit semi-persistently scheduled data from the first user equipment to the second user equipment, or to terminate semi-persistently scheduled data, and
wherein the first DCI is set to a same size as a third DCI by using padding bits, the third DCI being used for a communication between the first user equipment and the base station.
|