CPC H04W 72/20 (2023.01) | 20 Claims |
16. A first user equipment (UE), comprising:
a processor; and
a memory storing at least one instruction executable by the processor, wherein the at least one instruction causes the first UE to:
generate a first stage sidelink control information (SCI) including first resource allocation information and a first indicator indicating whether a second stage SCI includes second resource allocation information;
transmit the first stage SCI to the second UE on a physical sidelink control channel (PSCCH); and
perform first sidelink communication with the second UE by using a first resource region indicated by the first resource allocation information,
wherein the second resource allocation information included in the second stage SCI indicates a second resource region, and the second resource region is used for second sidelink communication.
|