| CPC H04W 56/0055 (2013.01) [H04W 56/004 (2013.01)] | 7 Claims |

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1. An apparatus, comprising:
at least one processor; and
at least one memory including computer program code, wherein the at least one memory and the computer program code are configured, with the at least one processor, to cause the apparatus to:
estimate a time synchronization accuracy associated with a plurality of base stations comprising at least a first base station and a second base station, wherein the time synchronization accuracy is estimated based at least partly on one or more uncertainty factors determined by the apparatus, and wherein the one or more uncertainty factors determined by the apparatus indicate at least a propagation delay associated with the plurality of base stations;
select the second base station from the plurality of base stations by comparing the estimated time synchronization accuracy associated with the plurality of base stations, wherein the estimated time synchronization accuracy associated with the second base station is higher than the estimated time synchronization accuracy associated with the first base station;
synchronize a clock based on the selected second base station; and
compensate the propagation delay associated with at least a subset of the plurality of base stations.
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